saving . . . saved Do Analysis Error has been deleted. Do Analysis Error has been hidden .
Do Analysis Error
In the above example it is showing me Do Analysis error:
no such vector found
Please suggest appropriate solution

Oscad General None min None sec 05-07-14, 10:58 a.m. Ashoka_L


This is a bug in the Oscad netlist converter. Can you try if you can reduce/minimize the number of gates, in some way?
05-07-14, 10:27 p.m. rakhiwarriar
The given circuit is of gated D-Latch can we replace it by D-Flipflop as they are same.
06-07-14, 10:18 a.m. Ashoka_L
Please go ahead and try it out.
07-07-14, 2:16 a.m. rakhiwarriar

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